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M 1/8:
Policies
Differences between Analog and Digital
|
W 1/10:
Conversion between decimal and base n |
F 1/12:
Hexadecimal and octal
addition |
M 1/15:
Dr. Martin Luther King, Jr. Holiday |
W 1/17:
2's complement and overflow |
|
F 1/19:
Introduction to gates and logic conventions |
M 1/22:
Analysis of Combinational Logic Circuits |
W 1/24:
Analysis continued, S-o-P and P-o-S |
F 1/26:
DeMorgan's Theorem, equivalent symbols, |
M 1/29:
All-NAND and All-NOR circuits |
|
W 1/31:
minterms, Maxterms |
F 2/2:
Design problems |
M 2/5:
Topics for Test 1 |
W 2/7:
Review for Test 1
Outline of Test 1 |
F 2/9:
Test 1 |
|
M 2/12:
Test 1 Grades
Test 1 Answers |
W 2/14:
Why minimize?
Boolean Algebra simplification |
F 2/16:
Intro to Karnaugh maps |
M 2/19:
K maps for
P-o-S |
W 2/21:
Rules for don't cares
K maps with don't cares |
|
F 2/23:
Quine-McCluskey or Tabular Minimization |
M 2/26:
Design alternatives:
PGA's (Altera) |
W 2/28:
Encoders and Decoders |
F 3/2:
Multiplexers and Demultiplexers |
M 3/5 - F 3/9:
Spring Break |
|
M 3/12:
ROMs
|
W 3/14:
PAL and PLA |
F 3/16:
Timing Diagrams Timing in LogicWorks |
M 3/19:
Topics for Test 2 |
W 3/21:
Test 2 |
|
F 3/23
Test 2 Grades
Test 2 Answers
|
M 3/26:
S-R Flip-flop
|
W 3/28:
Clocked, Edge-Triggered, D, J-K, T flip-flops |
F 3/30:
Mealey/Moore, State Transition Tables, Analysis |
M 4/2:
State Transition Diagrams |
|
W 4/4:
Excitation table, counters
|
F 4/6:
Step-by-step design |
M 4/9:
Design from word problems |
W 4/11:
Mealy/Moore transforms
|
F 4/13:
Good Friday Holiday |
|
M 4/16:
Equivalent states |
W 4/18:
State assignment
|
F 4/20:
Course/
Instructor Evaluation |
M 4/23:
Review for Test 3 |
W 4/25:
Test 3 |
|
F 4/27:
Grades for Test 3
Total points prior to final exam
Test 3 Answers |
M 4/30:
Fan-Out
DataSheet.gif |
W 5/2:
Review for Final Exam |
F 5/4:
Review for Final Exam |
Tu 5/8:
Final Exam
8 AM - 11 AM |
|
|
|
|
Final Exam Grades |
Semester Points and
Semester Grade |
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